74LV10D-T СПК, схеми, функції
Частина Ім'я: 74LV10D-T
Виробник:
Упаковка:
Опис: 3
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Температура: Мінімум °C | Макс °C
Розмір: KB
74LV10D-T
- 74LV10
Triple 3-input NAND gate - 74LV103
From datasheet system - 74LV107
Dual flip-flop with reset; negative-edge trigger - 74LV107D
Dual flip-flop with reset; negative-edge trigger - 74LV107D-T
J-K-Type Flip-Flop - 74LV107DB
Dual flip-flop with reset; negative-edge trigger - 74LV107DB-T
J-K-Type Flip-Flop - 74LV107N
Dual flip-flop with reset; negative-edge trigger - 74LV107PW
Dual flip-flop with reset; negative-edge trigger - 74LV107PW-T
J-K-Type Flip-Flop - 74LV107PWDH
Dual flip-flop with reset; negative-edge trigger - 74LV109
Dual flip-flop with reset; positive-edge trigger - 74LV1092
From datasheet system - 74LV109D
Dual flip-flop with reset; positive-edge trigger - 74LV109D-T
J-K-Type Flip-Flop